AI/ML RTL Engineer — Drive Next‑Gen NPU Microarchitecture

A leading technology company in Austin is looking for an experienced DSP Architect to design next-generation microarchitecture for AI/ML applications. You'll drive RTL design in SystemVerilog, collaborate closely with various engineering teams, and perform logic synthesis and power estimation. Candidates should have a strong foundation in AI/ML concepts, proficiency in Python and Perl, and ideally some experience in microprocessor design. This role offers a competitive salary range of $127,200 to $190,800 annually.

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