Director / Sr Director – EDA Design Methodology & Infrastructure

Lattice Semiconductor
San Jose, US

Why this role

Pace
Steady
Collaboration
High
Autonomy
High
Decision Impact
Company
Role Level
Manager

Derived from job-description analysis by Serendipath's career intelligence engine.

What success looks like

  • lead the strategy, development, and scaling of EDA flows, tools, and infrastructure
  • drive organization-wide adoption of methodologies and tools
Typical background
Master’s degree in Electrical Engineering, Computer Engineering, or related field15+ years of experience in semiconductor design and EDA methodologies

Transferable backgrounds

  • Coming from software engineering in finance
  • Coming from software engineering in healthcare

Skills & requirements

Required

EDA FlowsMethodologiesTool EcosystemsCompute InfrastructureCloud-based Design EnvironmentsLicense Management

Preferred

Automation And Advanced WorkflowsAi/ml-driven Design OptimizationCloud-native EDA Environments

Stack & domain

Eda FlowsMethodologiesToolsInfrastructureCompute FarmsLicense ManagementCloud-enabled Design EnvironmentsRtl Design And VerificationSynthesisPlace & RouteTiming AnalysisSignoffFull-chip Design FlowsAutomationAdvanced WorkflowsAi/ml-driven Design OptimizationCloud-native Eda EnvironmentsLeadershipCollaborationCommunicationProblem SolvingTeamworkSemiconductor DesignEda Ecosystems

About the role

Original posting from Lattice Semiconductor via LinkedIn

About Lattice

At Lattice, there’s a distinct energy—one driven by focused innovation, ownership, and real impact.

We build low-power programmable solutions that power applications across edge AI, connectivity, and security. Our teams operate across silicon, software, and systems, with a strong emphasis on speed, accountability, and technical excellence.

We’re large enough to solve complex problems, yet focused enough that individuals can meaningfully shape outcomes. If you’re passionate about building scalable systems that enable world-class engineering, Lattice offers a unique environment to make an impact.

About the Role

We are looking for a Director / Sr Director – EDA Design Methodology & Infrastructure to lead the strategy, development, and scaling of our EDA flows, tools, and infrastructure.

This role is central to enabling efficient and high-quality semiconductor design, ensuring engineering teams have the methodologies, environments, and tools needed to deliver complex silicon from RTL through signoff.

You will work at the intersection of design methodology, compute infrastructure, and EDA ecosystems, driving innovation in how design teams build and validate silicon.

EDA Strategy & Methodology

  • Define and drive long-term strategy for EDA flows, methodologies, and tool ecosystems
  • Architect and optimize end-to-end design flows (RTL → GDSII) across synthesis, verification, physical design, timing, and signoff
  • Establish best practices to improve design quality, predictability, and time-to-market

Infrastructure & Scalability

  • Lead infrastructure strategy across:
  • Compute farms
  • License management
  • Cloud-enabled design environments
  • Ensure scalable, efficient, and reliable EDA infrastructure deployment across global teams

Cross-Functional Leadership

  • Partner with design, verification, CAD, and IT teams to align flows with product needs
  • Drive organization-wide adoption of methodologies and tools
  • Collaborate with executive stakeholders on roadmap and priorities

Innovation & Transformation

  • Introduce modern approaches including:
  • Automation and advanced workflows
  • AI/ML-driven design optimization
  • Cloud-native EDA environments
  • Evaluate and benchmark tools from leading vendors, optimizing for performance, cost, and scalability

Team Leadership

  • Build and lead a high-performing team of EDA/CAD engineers
  • Mentor leaders and engineers, fostering a culture of technical excellence and innovation
  • Drive standardization, documentation, and training across the organization

Qualifications

  • Master’s degree in Electrical Engineering, Computer Engineering, or related field
  • 15+ years of experience in semiconductor design and EDA methodologies
  • 7+ years of experience in EDA/CAD leadership or methodology ownership

Technical Expertise

  • Deep understanding of:
  • RTL design and verification
  • Synthesis, place & route, timing analysis
  • Signoff and full-chip design flows
  • Strong experience with EDA tools, methodology development, and flow optimization
  • Familiarity with compute infrastructure, cloud-based design environments, and license management

Leadership Experience

  • Proven ability to lead cross-functional and global teams
  • Strong experience managing vendor relationships and tool ecosystems
  • Track record of driving organizational change and methodology adoption

Why This Role

  • Lead and shape the EDA backbone of next-generation silicon development
  • Work across methodology, tools, and infrastructure—not just one layer
  • High visibility role with broad organizational impact
  • Opportunity to drive modern, scalable, and cloud-enabled design environments

Source: Lattice Semiconductor careers (LinkedIn)

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