An innovative organization is seeking a Principal Engineer to lead FPGA design for cutting-edge 5G/6G projects. This role involves developing high-performance wireless communication solutions and optimizing FPGA implementations. Ideal candidates will possess strong expertise in Verilog coding and FPGA development, with a focus on real-time applications. The position offers a competitive salary, performance-based pay, and comprehensive benefits, including medical coverage and paid leave. Join a forward-thinking team dedicated to driving technological advancements in Hong Kong's smart city initiatives.
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FULL TIME
principal
4/11/2026
You will be redirected to ASTRI - Hong Kong Applied Science and Technology Research Institute's application portal.