Senior ASIC/FPGA Hardware Engineer – Cryptographic Systems

Location: Cambridge, MA Clearance Required: Must be eligible to obtain and maintain a U.S. government security clearance

A leading innovator in secure hardware technologies is seeking a Senior ASIC/FPGA Hardware Engineer to architect and implement advanced cryptographic systems. This role is ideal for engineers with deep expertise in digital hardware design and a strong foundation in cryptography and hardware security.

Role Overview

You will lead the design and specification of ASIC and FPGA -based security solutions, translating high -level cryptographic requirements into robust hardware architectures. Working closely with RTL designers, back -end implementation teams, and systems engineers, you’ll ensure secure, efficient, and scalable hardware designs that meet stringent performance and compliance standards.

Key Responsibilities

Architect and specify secure hardware solutions using ASIC/FPGA platforms

Guide RTL and physical design teams through implementation and optimization

Collaborate with systems engineers to define documentation, test plans, and software interfaces

Design and simulate transistor -level circuits to meet performance, power, and cost targets

Evaluate feasibility of complex cryptographic algorithms in hardware

Drive technical solutions independently, even with incomplete or evolving requirements

Contribute to proposal development and mentor junior engineers

Support physical layout, floor -planning, and parasitic -aware simulations

Requirements

Cryptographic Systems & Protocols

Asymmetric cryptography: ECC, RSA

Symmetric cryptography: AES, MAC, block cipher modes

Protocols: key exchange, digital signatures, key wrap

Secure design: memory isolation, secure enclaves

Secure protocols: secure boot, attestation, MFA, certificates, key split

Digital Hardware Design

ASIC/FPGA architecture and implementation

RTL development in SystemVerilog, Verilog, or VHDL

Translation of system -level requirements into hardware specifications

Optimization for performance, power, and area

Skills & Abilities

Proficiency in integrated circuit design and computer architecture

Strong mathematical foundation, including number theory and coding theory

Ability to write detailed design specifications and manage small technical teams

Excellent verbal and written communication skills

Strong organizational, time management, and problem -solving abilities

Education & Experience

Bachelor’s degree in Electrical Engineering or related field required; Master’s preferred

5–7 years (BS), 3–5 years (MS), or 0–2 years (PhD) of relevant experience in ASIC/FPGA hardware engineering

Preferred Qualifications

Knowledge of post -quantum cryptography (PQC), side -channel analysis, and lightweight cryptography

Experience with secure key storage, TRNGs, PUFs, anti -tamper, and TEMPEST techniques

Familiarity with NSA/NIST certification processes