Strong fit for experienced verification engineers who lead IP verification and collaborate with U.S.-based clients on 3D-stacked DRAM solutions.
Derived from job-description analysis by Serendipath's career intelligence engine.
Original posting from SK hynix America via Greenhouse
About SK hynix America:
At SK hynix America, we are at the forefront of semiconductor innovation. As a global leader in HBM, DRAM, and NAND flash technologies, we develop the advanced memory solutions powering everything from advanced mobile technology to massive AI data centers. With major investments in the U.S. and a leading position in the global AI revolution, we build the critical infrastructure of the digital landscape and remain committed to sustainable operations. We invite innovative minds to be part of our journey. Here, you will be part of a collaborative team pioneering the next generation of memory technologies, expanding our market footprint, and defining the future of computing.
Work Model: Onsite
Job Title: 3D Stacked DRAM - Logic Design Verification Engineer
Office Location: San Jose, CA
Job Type: Full-Time
Work Model: Onsite
Job Summary:
To strengthen leadership in the DRAM-on-Logic era through optimized DRAM die design, we are seeking talent capable of driving the verification of digital logic blocks. This strategic hiring initiative aims to enhance our global competitiveness by fostering deep engagement with key American clients, ensuring that our die design solutions are precisely aligned with their evolving technical requirements and market demands.
Responsibilities:
Lead advanced IP verification for 3D-stacked DRAM, enabling DRAM-on-Logic system configurations with customers
Verify digital logic blocks for 3D-stacked DRAM peripherals and DFT features, co-designing logic dies with U.S.-based customers
Build technical partnerships with key customers (TSMC, Intel) to address 3D-stacked DRAM and foundry technology needs
Establish verification of service-ready IPs and supporting infrastructure for the IP business
Collaborate with EDA vendors to develop the verification environment and ensure seamless IP integration in customer design flows
Co-develop next-generation DRAM-on-Logic solutions with key customers to strengthen competitiveness and market position
Qualifications:
Bachelor’s degree or higher in Electrical Engineering or a related discipline
Experience in semiconductor design verification, including test planning, verification environment development, simulation, debugging, and coverage analysis
4+ years of relevant experience in the following areas :
Performed functional verification of SoCs, in-house and third-party digital IPs, and mixed-signal designs using SystemVerilog and UVM
Developed specification-driven verification plans, test scenarios, and functional coverage models
Developed in-house SystemVerilog/UVM-based Verification IP (VIP), including UVM agents for new protocols and custom IP interfaces
Evaluated, integrated, and utilized third-party VIP within UVM-based verification environments
Executed regression tests, debugged test failures, and drove code and functional coverage closure through coverage analysis and targeted test development
Hands-on experience in end-to-end development of custom UVM agents based on design specifications
Excellent verbal and written communication in English; ability to present technical concepts to cross functional teams and senior management
Benefits:
Top Tier health insurance at no employee cost
Paid day offs: Paid Time Off, Company Holidays, Parental Leave, Happy Fridays
401k Matching
Flexible Spending Account (FSA) for Health Care & Dependent Care
Educational reimbursement up to $10,000 per year
Donation Matching and volunteering opportunities
Corporate discount programs
Free Breakfast/Lunch/Dinner provided to employees
Compensation:
Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets. Pay within the provided range varies by work location and may also depend on job-related skills and experience. Your Recruiter can share more about the specific salary range for the job location during the hiring process.
Pay Range$140,000—$310,000 USDEqual Employment Opportunity:
SK hynix America is an Equal Employment Opportunity Employer. We provide equal employment opportunities to all qualified applicants and employees and prohibit discrimination and harassment of any type without regard to race, sex, pregnancy, sexual orientation, religion, age, gender identity, national origin, color, protected veteran or disability status, genetic information, or any other status protected under federal, state, or local applicable laws.
In compliance with federal law, SK hynix America also participates in the federal E-Verify program. Upon accepting an offer of employment, all newly hired individuals will be required to complete Form I-9, which includes verifying identity and legal authorization to work in the United States. Please review the official government posters detailing your rights and protections prior to applying:
E-Verify Participation Poster (Bilingual English & Spanish)
IER Right to Work Poster (English)
IER Right to Work Poster (Spanish)