Post-Silicon Lab Manager

Tenstorrent
Santa Clara, CA
Hybrid

Who this role is best for

Geared toward candidates with semiconductor hardware experience comfortable with managing post-silicon validation and debug infrastructure.

Best fit for

  • Candidates with 8–12 years of semiconductor hardware experience and leadership in post-silicon validation teams
    — “you have 8–12+ years in semiconductor hardware, including 3+ years leading a post-silicon validation”
  • Individuals familiar with high-speed interfaces and board-level debug tools
    — “You know high-speed interfaces (PCIe, DDR/GDDR/HBM, SerDes) and fabric links in depth”
  • Candidates who can align lab infrastructure with tight tape-out and silicon-arrival schedules
    — “staying calm and quick when troubleshooting physical hardware under tight tape-out and silicon-arrival deadlines”

Things to consider

  • Compensation varies significantly based on experience and location
    — “Compensation for all engineers at Tenstorrent ranges from $100k - $500k”
  • Eligibility is subject to U.S. export control compliance requirements
    — “the offer may be contingent upon your citizenship/permanent residency status”

How to stand out

  • Emphasize experience in managing lab infrastructure across multiple programs
    — “scale the lab infrastructure to support multiple programs with varied requirements”
  • Highlight your ability to coordinate remote, multi-site teams effectively
    — “communicate clearly across functions and keep remote, multi-site teams aligned”
  • Demonstrate your hands-on skills with board-level debug tools and validation processes
    — “hands-on with board-level debug tools”
Pace · SteadyCollaboration · HighAutonomy · MediumDecision Impact · Team

Derived from job-description analysis by Serendipath's career intelligence engine.

What success looks like

  • run day-to-day lab operations
  • lead lab environment for first-silicon power-on
  • deploy and maintain server racks
  • manage CapEx budget
  • own inventory and calibration cycles
Typical background
8–12+ years in semiconductor hardware3+ years leading a post-silicon validation team

Skills & requirements

Required

Post-silicon ValidationSystem ValidationDebug InfrastructureHigh-speed InterfacesBoard-level Debug ToolsLab Management

Preferred

Chiplet SolutionsMulti-core CPURisc-v CPUAI TechnologySemiconductor Hardware

Stack & domain

Post-silicon ValidationSystem ValidationCustomer EnablementHigh-speed InterfacesBoard-level DebugServer RacksData AcquisitionPower TelemetryAutomated Test BenchesMulti-core CPUChiplet-based SystemsLab Safety ComplianceJiraConfluenceLab Scheduling ToolsLeadershipTeam ManagementProblem-solvingCommunicationCollaborationAdaptabilityTechnical ExpertiseSemiconductorHardwareValidationDebuggingEngineeringLab Management

About the role

Original posting from Tenstorrent via Greenhouse

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

To support our next-generation, high-performance RISC-V CPU architectures and advanced chiplet solutions, Tenstorrent is looking for a hands-on, experienced Post-Silicon Lab Manager. In this role, you will own the post-silicon lab infrastructure and manage operational workflows supporting bring-up, system validation, and customer enablement. You will scale the lab infrastructure to support multiple programs with varied requirements. You will direct post silicon validation engineers on cost building cost effective validation and debug infrastructure.

This role is hybrid, based out of Santa Clara, CA.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

You hold a B.S. or M.S. in Electrical Engineering, Computer Engineering, or a similar technical field, and you have 8–12+ years in semiconductor hardware, including 3+ years leading a post-silicon validation, characterization, or hardware lab team focused on CPUs.

You know high-speed interfaces (PCIe, DDR/GDDR/HBM, SerDes) and fabric links in depth, and you're hands-on with board-level debug tools.

You bring a startup mindset. You stay calm and quick when troubleshooting physical hardware under tight tape-out and silicon-arrival deadlines.

You communicate clearly across functions and keep remote, multi-site teams aligned from the Santa Clara hub.

What We Need

Run day-to-day lab operations for CPU post-silicon validation, power/performance assessment, and debug, with lab infrastructure aligned to tape-out and bring-up schedules.

Lead the lab environment for first-silicon power-on, system bring-up, and platform validation, including board-level fixes to salvage eval boards or meet new validation needs.

Deploy and maintain server racks, data acquisition, power telemetry rigs, and automated test benches for multi-core CPU and chiplet-based systems. Manage the CapEx budget for scopes, logic/protocol analyzers, and traffic generators.

Own inventory, calibration cycles, silicon allocation tracking, and lab safety compliance using JIRA, Confluence, and lab scheduling tools.

What You Will Learn

How to bring up first silicon on advanced multi-core CPU and chiplet architectures, from power-on to full platform validation.

How to build and scale a world-class post-silicon lab at a fast-moving company.

How to debug critical post-silicon issues alongside the Emulation, Silicon Design, Software, and Architecture teams.

How your lab's capacity planning and infrastructure decisions shape silicon schedules and product success.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology.  Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2).   These requirements apply to persons located in the U.S. and all countries outside the U.S.  As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency.  If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Source: Tenstorrent careers (Greenhouse)

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