Senior ASIC Package Design Engineer

K2 Space
United States
Remote

Who this role is best for

Geared toward candidates with deep expertise in FC-BGA and MCM packaging, comfortable with leading trade studies and vendor engagement for high-performance ASICs.

Best fit for

  • Candidates with 5+ years of FC-BGA ASIC package design experience and a track record of production success
    — “5+ years of experience in ASIC package design, with deep expertise in FC-BGA.”
  • Individuals who can lead trade studies and define package design standards for high-performance systems
    — “Lead package-level trade studies across cost, performance, power integrity (PI), signal integrity (SI), thermal, manufacturability, and reliability.”
  • Engineers with strong simulation tool proficiency in SI/PI and EM domains
    — “Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, and ADS.”

Things to consider

  • Must be a U.S. person or eligible for an export license due to ITAR compliance
    — “must therefore either be a 'U.S. person' as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.”
  • The role involves managing external vendors and suppliers for packaging and substrate technologies
    — “Manage relationships with external packaging vendors, substrate suppliers, and OSATs.”

How to stand out

  • Emphasize experience with high-pin-count and high-speed SerDes ASICs in your resume and interviews
    — “Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes.”
  • Highlight your ability to define and review substrate stack-ups and reference plane planning
    — “Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning.”
  • Showcase your track record in influencing silicon and system architecture through package design
    — “influencing silicon and system architecture.”
Pace · SteadyCollaboration · HighAutonomy · MediumDecision Impact · Team

Derived from job-description analysis by Serendipath's career intelligence engine.

What success looks like

  • implement advanced ASIC package architecture
  • ensure first-pass success for complex, high-speed, power-dense ASICs
Typical background
5+ years of experience in ASIC package design

Skills & requirements

Required

ASIC Package DesignFc-bga And MCM SolutionsPackage-level Trade StudiesPackage Design StandardsThermal Architecture

Preferred

Substrate Technology ChoicesAssembly Process Optimization

Stack & domain

ASIC Package DesignFlip-chip BGAMulti-chip ModulePackage ArchitectureSubstrate Stack-upBall-map StrategyPower DeliverySignal BreakoutMechanical ConstraintsPackage-level Trade StudiesPackage Design StandardsBest PracticesHigh-speed Digital InterfacesPower Delivery NetworkDecoupling StrategyThermal ArchitectureMaterial SelectionSubstrate Technology ChoicesAssembly Process OptimizationCollaborationProblem SolvingCommunicationLeadershipStrategic PlanningAccount ManagementCustomer Relationship ManagementForecastingReportingInfluenceTeamworkEngineeringElectronicsSatelliteSpaceTechnologyDesignManufacturingPackagingRFDigitalMixed-signalSocHigh-speedPowerThermalAssemblyMaterialsSubstrateAssembly Process

About the role

Original posting from K2 Space via Greenhouse

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.

The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.

With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply.

The Role 

We are seeking a Senior ASIC Package Design Engineer to implement advanced ASIC package architecture, with a strong focus on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions. This role supports the end-to-end package strategy for high-performance mixed-signal and digital SoCs from early architecture and trade studies through vendor engagement, qualification, and production ramp. You will collaborate with internal teams for package design, defining standards, influencing silicon and system architecture, and ensuring first-pass success for complex, high-speed, power-dense ASICs. 

Responsibilities 

Define ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints. 

Lead package-level trade studies across cost, performance, power integrity (PI), signal integrity (SI), thermal, manufacturability, and reliability. 

Establish package design standards, methodologies, and best practices.  

Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content. 

Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning. 

Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces.  

Support package-level SI/PI strategy, including high-speed digital interfaces, power delivery network (PDN) design, and decoupling strategy 

Lead thermal architecture at the package level, including lid selection, TIMs, heat-spreaders, and mechanical interfaces to system cooling.  

Manage relationships with external packaging vendors, substrate suppliers, and 

OSATs. 

Drive material selection, substrate technology choices, and assembly process optimization.  

Qualifications 

Bachelor’s degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering, or a related field. 

5+ years of experience in ASIC package design, with deep expertise in FC-BGA. 

Proven experience delivering high-pin-count, high-performance ASIC packages into production. 

Strong understanding of substrate technologies and materials, SI/PI fundamentals at the package level, and thermal management for power-dense ASICs. 

Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, and ADS. 

Experience working directly with OSATs and substrate vendors. 

Knowledge of packaging qualification and test methodologies. 

Nice to Have 

Experience with MCM or heterogeneous integration (chiplets, interposers, advanced laminates). 

Background in high-speed digital or mixed-signal SoCs. 

Familiarity with aerospace, space, or high-reliability electronics. 

Compensation and Benefits:

Base salary range for this role is $180,000 – $260,000 + equity in the company

Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level

Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged!

If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know.

Export Compliance

As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.”

The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.

Equal Opportunity

K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Source: K2 Space careers (Greenhouse)

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